Circuit gates pulse train without truncating

Source: http://www.edn.com/design/systems-design/4438302/Circuit-gates-pulse-train-without-truncating

To gate an integral clock pulse sequence from a continuous source without distorting pulse duration and number is not a trivial task. In most cases, a simple AND gate will cause problems, see Figure 1.

Clock pulses pass through the AND gate as long as the asynchronous strobe E is high. If loss or distortion of even one pulse is critical, then the simple AND gate is unsuitable, as the first and the last pulse in the burst will often be distorted (shorter than usual pulse) due to the lack of synchronization between clock andE.

This Design Idea demonstrates a mathematical approach to synthesize an asynchronous gated circuit able to gate an accurate pulse train from a clock signal without distorting pulse duration. Such circuits are called quantizers.

Figure 1  Two ways of gating pulse train, using gate signal E and an AND gate (Y output), or a quantizer (blue)

Let’s make a state transition table based on the operational principle of a quantizer:

Figure 2  Asynchronous finite-state machine (FSM) transition primary table, where 1,2,3,4,5,6,7, the numbers of stable FSM states, are circled (G is the clock input)

Using Figure 2, let’s make final pairs tables according to Mealy and Moore: 

Figure 3  Final pairs tables by Mealy (left) and Moore (right), where:

• MC1: 2-5-6-7 and MC2: 1-3-4 are maximum compatible sets (by Mealy)
• MC1: 5-7, MC2: 1-2-6 and MC3: 1-3-4 are maximum compatible sets (by Moore)

As we can see from Figure 3, total coverage by Moore requires a greater number of maximum compliant subsets, i.e., it’s worse. On the other hand, the first state is alternatively a part of sets MC2 and MC3, which presents opportunities for extra circuit optimization. However, we shall not consider this further.

Now, it’s easy to draw a compressed state transition table and Karnaugh-Veitch maps for the Z-coding memory element and output gated signal Y:

 

Figure 4  Map of Z-coding (by Mealy), compressed state transition table, and Z-Y Karnaugh-Veitch maps

Bearing in mind the Karnaugh-Veitch maps, let’s write down logic equations for the synthesized circuit:

The minterm [/E · z] for z⁺ in this formula is not redundant as it may seem. It plays the important role of a counter-race bridge between minterms [/G · /E] and [G · z], eliminating their consecutive races at all edges of G.

Figure 5  Example implementation of the quantizer, where:

• /E = inverted input of the asynchronous strobe signal
• G = clock
• Y = quantizer output

It is possible to add some extra features – for example, FLAG. When FLAG is low, the first pulsein the burst is not cut, but incorporated in the burst without affecting its duration. When FLAG is high, the first pulse is cut and excluded from the burst. State of the FLAG should be kept unchanged till the next strobe pulse, so your equipment has enough time to read it and use for further processing.

This type of quantizer may be useful in designs sensitive not only to the number of pulses in the burst, but to the pulse phase; for example, in radar equipment.